BD applications in Redstone logic gates

[Rasuth]

XD

In the meantime... I started working on a JK-FF when I stumbled upon a new way to power the 2 BDs needed for the AND gates in my D-Flip Flop. I think this deserves a Mark II as it is now tiny 2x3x6.

D-FlipFlop v2.0

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Doing curcuitry in 3D and minimizing it proves to be a nice brain teaser ^^

[HavokSCOUT]

The two inputs don't seem to be isolated, but that's nothing a repeater can't handle. Adding to OP.

[Rasuth]

I spend a good amount of time figuring out how to do a JK-FlipFlop using a D-FF desgin. In a nutshell, the BD-RS-Latch used in the D-FF has too much feedback potential. Stable outputs when J=1 and K=1 couldn't be achieved.

So I turned to the B-FF as internal memory cell, triggering it only when the Clock pulses AND one of the following is true (J AND (NOT Q)) OR (K AND Q). See Spoiler: Truthtable for explanation. I monostabled my clock to give pulses of 3 ticks (not in picture).

The outcome is quite pleasing: very lean, smaller than the traditional implementations and easy to build.

Picture time!

JK-FlipFlop using BD

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The JK-FF has 4 potential states, depending on the inputs J(ump) and K(ill) every clock pulse one of the following happens:
J=0, K=0 : keep state, Output stays the same.
J=1, K=0 : Jump, Output is set to true.
J=0, K=1 : Kill, Output is set to false.
J=1, K=1 : Trigger, Output changes state from false to true or vice versa.
This design by Rasuth uses a B-FF as internal memory cell and triggers it when (Clock AND ((J AND NOT(Q)) OR (K AND Q)) evaluates to true. Size: 6x3x11

truthtable

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Q is the current output of the FF, Q+ is the output after the next clock pulse. T indicates wether the internal T-FF needs to be triggered or not.
J|K|Q|Q+|T = (Q XOR Q+)
0|0|0|0 |0
0|0|1|1 |0
0|1|0|0 |0
0|1|1|0 |1
1|0|0|1 |1
1|0|1|1 |0
1|1|0|1 |1
1|1|1|0 |1

There's probably some potential to make it smaller. I'm just happy I got it working.

Thanks to Battosay for his amazing B-FF design.

[HavokSCOUT]

Like I said in an earlier post, I barely understand this, so I am going to quote your description and use that in the OP.

[Rasuth]

Do that ^^
Actually I wrote the spoiler the way I did, for exactly that purpose ;)

So, have you got your head around my "Implies" gate yet? Yours was just a glorified repeater that outputs B, no matter what A is.

Edit: Might as well post it ^^

Implies gate

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The "Implies" gate outputs a current as long as the logical statement (A -> B) (read: "A implies B") holds true. This equivalent to the statement (B OR NOT(A)). In other words the output is only off, if A=1 and B=0. In all other cases the output is on.
Design by Rasuth. Size: 2x2x3

[HavokSCOUT]

Looks like this is a simply case of me not knowing what the f*ck that did.^^ Added to the op.